STP38N06 Datasheet, PDF (1/11 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE ”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR

STP38N06
N - CHANNEL ENHANCEMENT MODE
”ULTRA HIGH DENSITY” POWER MOS TRANSISTOR
TYPE
ST P38N06
VDSS
60 V
RDS(on)
< 0.03 Ω
ID
38 A (*)
PRELIMINARY DATA
s TYPICAL RDS(on) = 0.026 Ω
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s HIGH CURRENT CAPABILITY
s 175^oC OPERATING TEMPERATURE
s HIGH dV/dt RUGGEDNESS
s APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s POWER MOTOR CONTROL
s DC-DC & DC-AC CONVERTERS
s SYNCRONOUS RECTIFICATION
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS Drain-source Voltage (VGS = 0)
VDGR Drain- gate Voltage (RGS = 20 kΩ)
VGS
I_D
I_D
IDM(•)
Ptot
Gate-source Voltage
Drain Current (continuous) at T_c = 25 ^oC
Drain Current (continuous) at T_c = 100 ^oC
Drain Current (pulsed)
Total Dissipation at Tc = 25 ^oC
Derating Factor
dV/dt(1 ) Peak Diode Recovery voltage slope
Tstg St orage Temperature
Tj
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
March 1996
Value
60
60
± 20
38
26
152
90
0.6
7
-65 to 175
175
Uni t
V
V
V
A
A
A
W
W/^oC
V/ ns
o_C
o_C
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