STP30NS15LFP Datasheet, PDF (1/9 Pages) STMicroelectronics – N-CHANNEL 150V - 0.085 W - 10A TO-220FP MESH OVERLAY™ POWER MOSFET

STP30NS15LFP
N-CHANNEL 150V - 0.085 Ω - 10A TO-220FP
MESH OVERLAY™ POWER MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STP30NS15LFP 150 V
<0.1Ω
10 A
s TYPICAL R_DS(on) = 0.085Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an advanced
family of power MOSFETs with outstanding
performances. The new patent pending strip layout
coupled with the Company’s proprietary edge termination
structure, gives the lowest RDS(on) per area,
exceptional avalanche and dv/dt capabilities and
unrivalled gate charge and switching characteristics.
APPLICATIONS
s SWITCHING “S” CAPACITOR
3
2
1
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuous) at T_C = 25°C
I_D
Drain Current (continuous) at T_C = 100°C
I_DM(•) Drain Current (pulsed)
P_tot
Total Dissipation at T_C = 25°C
Derating Factor
E_AS(1) Single Pulse Avalanche Energy
dv/dt ⁽²⁾ Peak Diode Recovery voltage slope
T_stg
Storage Temperature
T_j
Operating Junction Temperature
(•) Pulse width limited by safe operating area.
July 2003
.
Value
150
150
± 15
10
7
40
30
0.2
300
2.4
Unit
V
V
V
A
A
A
W
W/°C
mJ
V/ns
-55 to 175
°C
(1) Starting Tj = 25 ^oC, ID = 15A, VDD= 75V
(2) I_SD ≤35A, di/dt ≤300A/µs, V_DD ≤ V_(BR)DSS, T_j ≤ T_JMAX.
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