STP2NA50 Datasheet, PDF (1/6 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE POWER MOS TRANSISTOR

STP2NA50
STP2NA50FI
N - CHANNEL ENHANCEMENT MODE
POWER MOS TRANSISTOR
PRELIMINARY DATA
TYPE
ST P2NA 50
ST P2NA 50FI
VDSS
500 V
500 V
RDS(o n)
<4Ω
<4Ω
ID
2.8 A
2A
s TYPICAL RDS(on) = 3.25 Ω
s ± 30V GATE TO SOURCE VOLTAGE RATING
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
s REDUCED THRESHOLD VOLTAGE SPREAD
APPLICATIONS
s MEDIUM CURRENT, HIGH SPEED
SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s CONSUMER AND INDUSTRIAL LIGHTING
3
2
1
TO-220
3
2
1
ISOWATT220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
V_{D GR}
V_GS
ID
ID
IDM(•)
P_tot
Drain-Source Voltage (Vgs = 0)
Drain-Gate Voltage (R_gs = 20 KΩ)
Gate-Source Voltage
Drain-Current (continuous) at Tc = 25^oC
Drain-Current (continuous) at Tc = 100^oC
Drain-Current (Pulsed)
Tot al Dissipation at T_c = 25^oC
Derating Factor
VISO Insulation W ithst and Voltage (DC)
T_stg Storage T emperature
Tj
Max Operating Junction Temperature
(•)Pulse width limited by safe operating area
March 1996
Value
STP2NA50
S TP2NA 50F I
500
500
± 30
2.8
2
1.8
1 .2 5
11.2
1 1. 2
75
35
0.6
0 .2 8
-
4000
-65 to 150
150
Unit
V
V
V
A
A
A
W
W/^oC
V
o_C
o_C
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