STP21N05L Datasheet, PDF (1/10 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR

STP21N05L
STP21N05LFI
N - CHANNEL ENHANCEMENT MODE
LOW THRESHOLD POWER MOS TRANSISTOR
TYPE
STP21N05L
STP21N05LFI
VDSS
50 V
50 V
R DS( on)
< 0.085 Ω
< 0.085 Ω
ID
21 A
14 A
s TYPICAL R_DS(on) = 0.065 Ω
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s LOW GATE CHARGE
s LOGIC LEVEL COMPATIBLE INPUT
s 175 ^oC OPERATING TEMPERATURE
s APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SOLENOID AND RELAY DRIVERS
s REGULATORS
s DC-DC & DC-AC CONVERTERS
s MOTOR CONTROL, AUDIO AMPLIFIERS
s AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
3
2
1
TO-220
3
2
1
ISOWATT220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
V_{D S}
V_{DG R}
Drain-source Voltage (V_GS = 0)
Drain- gate Voltage (R_GS = 20 kΩ)
VGS
I_D
I_D
ID M(•)
Ptot
Gate-source Voltage
Drain Current (continuous) at T _c = 25 ^oC
Drain Current (continuous) at T _c = 100 ^oC
Drain Current (pulsed)
Total Dissipation at Tc = 25 ^oC
Derating Factor
VISO Insulation Withstand Voltage (DC)
Tstg Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
July 1993
Val ue
STP21N05L
STP21N05LFI
50
50
± 15
21
14
14
9
84
84
80
35
0. 53
0. 23

2000
-65 to 175
175
Unit
V
V
V
A
A
A
W
W/^oC
V
o_C
o_C
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