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STP20N10L Datasheet, PDF (1/10 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR | |||
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STP20N10L
STP20N10LFI
N - CHANNEL ENHANCEMENT MODE
LOW THRESHOLD POWER MOS TRANSISTOR
TYPE
STP20N10L
STP20N10LFI
VDSS
100 V
100 V
R DS( on)
< 0.12 â¦
< 0.12 â¦
ID
20 A
12 A
s TYPICAL RDS(on) = 0.09 â¦
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100oC
s LOW GATE CHARGE
s HIGH CURRENT CAPABILITY
s 175oC OPERATING TEMPERATURE
s LOGIC LEVEL COMPATIBLE INPUT
s APPLICATION ORIENTED
CHARACTERIZATION
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SOLENOID AND RELAY DRIVERS
s REGULATORS
s DC-DC & DC-AC CONVERTERS
s MOTOR CONTROL, AUDIO AMPLIFIERS
s AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
3
2
1
TO-220
3
2
1
ISOWATT220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-source Voltage (VGS = 0)
VDG R Drain- gate Voltage (RGS = 20 kâ¦)
VGS Gate-source Voltage
ID
Drain Current (continuous) at T c = 25 oC
ID
Drain Current (continuous) at T c = 100 oC
IDM(â¢) Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 oC
Derating Factor
VISO Insulation Withstand Voltage (DC)
Tstg Storage Temperature
Tj
Max. Operating Junction Temperature
(â¢) Pulse width limited by safe operating area
November 1996
Val ue
STP20N10L
STP20N10LFI
100
100
± 15
20
12
14
8
80
80
105
40
0.7
0. 27

2000
-65 to 175
175
Unit
V
V
V
A
A
A
W
W/oC
V
oC
oC
1/10
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