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STP135N10 Datasheet, PDF (1/8 Pages) STMicroelectronics – N-CHANNEL 100V - 0.007 ohm - 135A DPAK/TO-220 LOW GATE CHARGE STripFET POWER MOSFET
STB135N10
STP135N10
N-CHANNEL 100V - 0.007 Ω - 135A D²PAK/TO-220
LOW GATE CHARGE STripFET™ POWER MOSFET
TARGET DATA
TYPE
VDSS
RDS(on)
ID
STB135N10
STP135N10
100 V
100 V
<0.009 Ω 135 A(*)
<0.009 Ω 135 A(*)
s TYPICAL RDS(on) = 0.007Ω
s EXCEPTIONAL dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s SURFACE-MOUNTING D2PAK (TO-263)
POWER PACKAGE IN TUBE (NO SUFFIX) OR
IN TAPE & REEL (SUFFIX “T4”)
3
1
D2PAK
TO-263
(Suffix “T4”)
3
2
1
TO-220
DESCRIPTION
This MOSFET is the result of STMicroelectronics’s well
established and consolidated STripFET technology utiliz-
ing the most recent layout optimization. The device exhib-
its extremely low on-resistance, gate charge and diode’s
reverse recovery charge Qrr making it the ideal switch in
a very large spectrum of applications such as Automotive,
Consumer, Telecom and Industrial.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s PRIMARY SWITCH IN TELECOM DC-DC
CONVERTER
s HIGH-EFFICIENCY DC-DC CONVERTERS
s 42V AUTOMOTIVE APPLICATIONS
s SYNCHRONOUS RECTIFICATION
s DIESEL INJECTION
s PWM UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS
Gate- source Voltage
ID(*)
Drain Current (continuous) at TC = 25°C
ID
Drain Current (continuous) at TC = 100°C
IDM(1)
Drain Current (pulsed)
Ptot
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (2) Peak Diode Recovery voltage slope
EAS (3) Single Pulse Avalanche Energy
Tstg
Storage Temperature
Tj
Operating Junction Temperature
(1) Pulse width limited by safe operating area.
(*) Value limited by wire bonding
Value
100
100
± 20
135
96
540
150
1
TBD
TBD
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
-55 to 175
°C
(2) ISD ≤ 40A, di/dt ≤ 600A/µs, VDD ≤BVDSS, Tj ≤ TJMAX.
(3) Starting Tj = 25 oC, ID = 40A, VDD = 50V
July 2003
1/8
This is preliminary information on a new product forseen to be developped. Details are subject to change without notice