STP10NC50 Datasheet, PDF (1/7 Pages) STMicroelectronics – N - CHANNEL 500V - 0.48ohm - 10A - TO-220/TO-220FP PowerMESH MOSFET

STP10NC50
®
STP10NC50FP
N - CHANNEL 500V - 0.48Ω - 10A - TO-220/TO-220FP
PowerMESH™ MOSFET
PRELIMINARY DATA
TYPE
VDSS
RDS(on)
ID
ST P10 NC5 0
500 V
STP10NC50FP 500 V
< 0.52 Ω
< 0.52 Ω
10 A
10 A
s TYPICAL R_DS(on) = 0.48 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
3
2
1
3
2
1
TO-220
TO-220FP
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITCH MODE POWER SUPPLIES (SMPS)
s DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
Parameter
V_DS Drain-source Volt age (V_GS = 0)
V _DGR
V_GS
I_D
I_D
Drain- gate Voltage (R_GS = 20 kΩ)
Gate-source Voltage
Drain Current (continuous) at T_c = 25 ^oC
Drain Current (continuous) at T_c = 100 ^oC
I_DM(•) Drain Current (pulsed)
P_tot Total Dissipation at T_c = 25 ^oC
Derating Factor
dv/dt(1) Peak Diode Recovery voltage slope
V_ISO Insulat ion Withstand Voltage (DC)
T_stg Storage Temperature
T_j Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
(*) Limited only by maximum temperature allowed
November 1999
Value
STP10NC50 STP10NC50FP
500
500
± 30
10
10(*)
6.3
6. 3 (* )
40
40
135
40
1.08
0.32
3
3

2000
-65 to 150
150
( 1) ISD ≤ 10 A, di/dt ≤100 A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
Un it
V
V
V
A
A
A
W
W /^o C
V/ns
V
o_C
o_C
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