STLVDS104 Datasheet, PDF (1/8 Pages) STMicroelectronics – 4-PORT LVDS AND 4-PORT TTL-TO LVDS REPEATERS

STLVDS104
4-PORT LVDS AND 4-PORT TTL-TO LVDS
REPEATERS
s RECEIVER AND DRIVERS MEET OR
EXCEED THE REQUIREMENTS OF ANSI
EIA/TIA-644 STANDARD, RECEIVERS
DIFFERENTIAL INPUT LEVELS, ±100mV
s DESIGNED FOR SIGNALING RATES UP TO
630Mbps
s OPERATES FROM A SINGLE 3.3V SUPPLY
s LOW VOLTAGE DIFFERENTIAL SIGNALING
WITH TYPICAL OUTPUT VOLTAGE OF
350mV AND A 100Ω LOAD
s PROPAGATION DELAY TIME: 3.1ns (TYP)
s ELECTRICALLY COMPATIBLE WITH LVDS,
PECL, LVPECL, LVTTL, LVCOMOS, GTL,
BTL, CTT, SSTL, OR HSTL OUTPUTS WITH
EXTERNAL NETWORK
s BUS TERMINAL ESD (HBM) EXCEEDS 7KV
s SO AND TSSOP PACKAGING
DESCRIPTION
The STLVDS104 is a differential line receiver and
a LVTTL input connected to four differential line
drivers that implement the electrical
characteristics of low voltage differential signaling,
for point to point baseband data transmission over
controlled impedance media of approximately
100Ω. The transmission media can be
printed-circuit board traces, backplanes, or cable.
SOP
TSSOP
LVDS, as specified in EIA/TIA-644 is a data
signaling technique that offers low-power, low
noise coupling, and switching speed to transmit
data at a speed up to 630Mbps at relatively long
distances.
The drivers integrated into the same substrate,
along with the low pulse skew of balanced
signaling, allow extremely precise timing
alignment of the signals repeated from the input.
The device allows extremely precise timing
alignment of the signal repeated from the input.
This is particularly advantageous in distribution or
expansion of signals such as clock or serial data
stream.
ORDERING CODES
Type
STLVDS104BD
STLVDS104BDR
STLVDS104BTR
Temperature
Range
-40 to 85 °C
-40 to 85 °C
-40 to 85 °C
Package
SO-16 (Tube)
SO-16 (Tape & Reel)
TSSOP16 (Tape & Reel)
Comments
50parts per tube / 20tube per box
2500 parts per reel
2500 parts per reel
May 2003
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