STL35NF10 Datasheet, PDF (1/6 Pages) STMicroelectronics – N-CHANNEL 100V - 0.025ohm - 35A PowerFLAT™ LOW GATE CHARGE STripFET™ MOSFET

STL35NF10
N-CHANNEL 100V - 0.025Ω - 35A PowerFLAT™
LOW GATE CHARGE STripFET™ MOSFET
PRELIMINARY DATA
TYPE
V_DSS
R_DS(on)
I_D
STL35NF10
100 V < 0.030 Ω 35 A
s TYPICAL R_DS(on) = 0.025Ω
s IMPROVED DIE-TO-FOOTPRINT RATIO
s VERY LOW PROFILE PACKAGE
DESCRIPTION
This Power MOSFET is the second generation of
STMicroelectronics unique “STripFET™” technolo-
gy. The resulting transistor shows extremely low on-
resistance and minimal gate charge. The new Pow-
erFLAT™ package allows a significant reduction in
board space without compromising performance.
PowerFLAT™(6x5)
(Chip Scale Package)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH EFFICIENCY ISOLATED DC/DC
CONVETERS
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuos) at T_C = 25°C
Drain Current (continuos) at T_C = 100°C
I_DM (q) Drain Current (pulsed)
P_TOT
Total Dissipation at T_C = 25°C
Derating Factor
E_AS (1) Single Pulse Avalanche Energy
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(q) Pulse width limited by safe operating area
August 2001
Value
100
100
± 20
35
22
Unit
V
V
V
A
A
140
80
0.64
135
–65 to 150
–55 to 150
A
W
W/°C
mJ
°C
°C
(1) Starting T_j = 25°C, I_D = 35A, V_DD = 50V
1/6