STIDP880 Datasheet, PDF (1/6 Pages) STMicroelectronics – iDP to LVDS converter

STiDP880
Features
■ Internal DisplayPort (iDP) receiver
– Compliant with proposed iDP specification
– 3.24 Gbps per lane
– 1, 2, or 4 lanes
– HPD pulse assertion as per proposed iDP
standard
■ Supports video timings up to 1920 x 1080
(FHD) 120 Hz/10-bit color
■ Interface compatibility with wide range of
panels
– Quad LVDS interface up to 100 MHz per
channel (400 MHz pixel rate)
– High speed dual-link LVDS up to 150 MHz
per channel (300 MHz pixel rate)
– Supports JEIDA, non-JEIDA, VESA pixel
data mappings
iDP to LVDS converter
Data brief
■ Supports Asynchronous Scrambler Seed
Reset (ASSR) for premium contents reception
■ Configurable through I2C host interface
■ Supports Spread Spectrum for EMI/RFI
reduction
■ Robust interoperability – supports FFC and
UTP type cables
■ Low power operation; 20 mW standby
■ Package
– 164 LFBGA (12 x 12 mm/0.8 mm pitch)
– HF and RoHS compliant
■ Power supply voltages
– 3.3 V I/O; 1.2 V core
■ ESD
– 2 KV HBM, 200 V MM, 600V CDM
Applications
■ High refresh rate TV/monitor panel interface
iDP Input
4 Main Lanes
HPD
Internal
DisplayPort
Receiver
Bus Formatter
LVDS Outputs
I2C Host
Interface
Q-LVDS
output
December 2009
Doc ID 16899 Rev 1
For further information contact your local STMicroelectronics sales office.
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