STI5300 Datasheet, PDF (1/3 Pages) STMicroelectronics – High-performance set-top box decoder

STi5300
High-performance set-top box decoder
DATA BRIEF
DESCRIPTION
The new STi5300 MPEG-2 decoder from ST
provides a step-change in performance for pay TV
set-top boxes and digital video recorders.
Delivering 1.33 GOPS of processing power
through an ST230 VLIW CPU running at 333 MHz,
ST has ensured that manufacturers’ investment in
new products is protected as the STi5300 can
easily accommodate today’s interactive software,
and provides a platform that can support the even
more demanding applications of the future. Both
Linux and OS21 operating systems are supported,
and an MMU provides support for virtual memory
management.
The STi5300’s power comes from the VLIW
architecture of the ST230 CPU. This allows four
instructions to be executed at each CPU cycle,
dramatically increasing performance. By
maintaining pin compatibility with the STi5100,
manufacturers can make use of the STi5300 with
minimal hardware redesign.
Package (27 x 27 PBGA 336 package)
xxxx
Figure 1. STi5300 low-cost interactive set-top box
QPSK ZIF Rx
STV0299
and
STB6000
HDD
Transport
stream in
USB
port
128 Mbit
DDR
QPSK ZIF Rx
STV0299
and
STB6000
(Optional)
Transport
stream in
STi5300
IR Tx/Rx
RGB
CVBS/YC
VCR
PSTN
SiLabs
DAA
SSmmaartrt
cCaradrsds
Flash
September 2005
Rev. 1
1/3