STG5223 Datasheet, PDF (1/19 Pages) STMicroelectronics – Low voltage 0.5 Ω dual SPDT switch with break-before-make

STG5223
Low voltage 0.5 Ω dual SPDT switch
with break-before-make
Features
■ Ultra low power dissipation:
I_CC = 0.2 μA (max.) at T_A= 85 °C
■ Low ON resistance:
– R_ON = 0.50 Ω (max. T_A = 25 °C) at
V_CC = 4.3 V
– R_ON = 0.55 Ω (max. T_A = 25 °C) at
V_CC = 3.6 V
– R_ON = 0.55 Ω (max. T_A = 25 °C) at
V_CC = 3.0 V
■ Wide operating voltage range:
V_CC (opr) = 1.65 V to 4.3 V single supply
■ 5 V tolerant and 1.8 V compatible threshold on
digital control input at V_CC = 1.65 to 4.3 V
■ Latch-up performance exceeds 300 mA
(JESD 17)
■ ESD performance:
HBM > 2 kV (MIL STD 883 method 3015)
Description
The STG5223 is a high-speed CMOS dual analog
SPDT (single pole dual throw) switch or dual 2:1
multiplexer/demultiplexer bus switch fabricated in
silicon gate C²MOS technology. It is designed to
operate from 1.65 to 4.3 V, making this device
ideal for portable applications.
It offers very low ON resistance (<0.5 Ω) at
V_CC = 3.0 V. The nIN inputs are provided to
control the switches. The switches nS1 are ON
(connected to common ports Dn) when the nIN
input is held high and OFF (high impedance state
QFN10L
(1.8 x 1.4 mm)
exists between the two ports) when nIN is held
low. The switches nS2 are ON (connected to
common ports Dn) when the nIN input is held low
and OFF (high impedance state exists between
the two ports) when IN is held high. Additional key
features are fast switching speed, break-before-
make delay time and ultra low power
consumption. All inputs and outputs are equipped
with protection circuits against static discharge,
giving them ESD immunity and transient excess
voltage immunity.
Table 1. Device summary
Order code
STG5223QTR
\
Package
QFN10L (1.8 x 1.4 mm)
Packaging
Tape and reel
January 2008
Rev 1
1/19
www.st.com
19