STG3685 Datasheet, PDF(1/10 Page) STMicroelectronics – LOW VOLTAGE 0.5ohm MAX DUAL SPDT SWITCH, SINGLE ENABLE WITH BREAK BEFORE MAKE FEATURE

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STG3685 Datasheet, PDF (1/10 Pages) STMicroelectronics – LOW VOLTAGE 0.5ohm MAX DUAL SPDT SWITCH, SINGLE ENABLE WITH BREAK BEFORE MAKE FEATURE

STG3685

LOW VOLTAGE 0.5â¦ MAX DUAL SPDT SWITCH,

SINGLE ENABLE WITH BREAK BEFORE MAKE FEATURE

I HIGH SPEED:

tPD = 0.3ns (TYP.) at VCC = 3.0V

tPD = 0.4ns (TYP.) at VCC = 2.3V

I ULTRA LOW POWER DISSIPATION:

ICC = 0.2ÂµA (MAX.) at TA = 85Â°C

I LOW "ON" RESISTANCE VI = 0V:

RON = 0.4â¦ (MAX. TA = 25Â°C) at VCC = 4.2V

RON = 0.5â¦ (MAX. TA = 25Â°C) at VCC = 3.0V

RON = 0.6â¦ (MAX. TA = 25Â°C) at VCC = 2.3V

I WIDE OPERATING VOLTAGE RANGE:

VCC (OPR) = 1.4V to 4.3V SINGLE SUPPLY

I 4.3V TOLERANT AND 1.8V COMPATIBLE

THRESHOLD ON DIGITAL CONTROL INPUT

at VCC = 2.3 to 4.3V

I LATCH-UP PERFORMANCE EXCEEDS

300mA (JESD 17)

I ESD PERFORM. (ANALOG CHAN. vs GND):

HBM > 4KV (MIL STD 883 method 3015)

DESCRIPTION

The STG3685 is an high-speed CMOS DUAL

ANALOG S.P.D.T. (Single Pole Dual Throw)

SWITCH or DUAL 2:1 Multiplexer/Demultiplexer

Bus Switch fabricated in silicon gate C2MOS

technology. It is designed to operate from 1.4V to

4.3V, making this device ideal for portable

applications.

It offers very low ON-Resistance (<0.5â¦) at

VCC=3.0V. The IN input is provided to control the

switches. The switches nS1 are ON (they are

PRELIMINARY DATA

Flip-Chip

Table 1: Order Codes

PACKAGE

Flip-Chip9

T&R

STG3685BJR

connected to common Ports Dn) when the IN input

is held high and OFF (high impedance state exists

between the two ports) when IN is held low; the

switches nS2 are ON (they are connected to

common Ports Dn) when the IN input is held low

and OFF (high impedance state exists between

the two ports) when IN is held high. Additional key

features are fast switching speed, Break Before

Make Delay Time and Ultra Low Power

Consumption. All inputs and outputs are equipped

with protection circuits against static discharge,

giving them ESD immunity and transient excess

voltage. Itâs available in the commercial

temperature range Flip-chip package with Epoxy

Protection.

Figure 1: Pin Connection (Top Through View) And Schematic Circuit

July 2005

Rev. 2

1/10

This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.

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