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STG3684_05 Datasheet, PDF (1/11 Pages) STMicroelectronics – LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE
STG3684
LOW VOLTAGE 0.5Ω MAX DUAL SPDT SWITCH
WITH BREAK BEFORE MAKE FEATURE
I HIGH SPEED:
tPD = 0.3ns (TYP.) at VCC = 3.0V
tPD = 0.4ns (TYP.) at VCC = 2.3V
I ULTRA LOW POWER DISSIPATION:
ICC = 0.2µA (MAX.) at TA = 85°C
I LOW "ON" RESISTANCE VIN = 0V:
RON = 0.5Ω (MAX. TA = 25°C) at VCC = 2.7
QFN
RON = 0.8Ω (MAX. TA = 25°C) at VCC = 2.3V
RON = 3.0Ω (MAX. TA = 25°C) at VCC = 1.8V
Table 1: Order Codes
I WIDE OPERATING VOLTAGE RANGE:
) VCC (OPR) = 1.65V to 4.3V SINGLE SUPPLY
t(s I 4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUT
uc at VCC = 2.3 to 3.0V
d I LATCH-UP PERFORMANCE EXCEEDS
ro 300mA (JESD 17)
P I ESD PERFORM. (ANALOG CHAN. vs GND):
HBM > 7KV (MIL STD 883 method 3015)
lete DESCRIPTION
o The STG3684 is an high-speed CMOS DUAL
s ANALOG S.P.D.T. (Single Pole Dual Throw)
b SWITCH or DUAL 2:1 Multiplexer/Demultiplexer
O Bus Switch fabricated in silicon gate C2MOS
- technology. It is designed to operate from 1.65V to
) 4.3V, making this device ideal for portable
t(s applications.
c It offers very low ON-Resistance (<0.5Ω) at
u VCC=3.0V. The nIN inputs are provided to control
Obsolete Prod Figure 1: Pin Connection
PACKAGE
QFN
T&R
STG3684QTR
the switches. The switches nS1 are ON (they are
connected to common Ports Dn) when the nIN
input is held high and OFF (high impedance state
exists between the two ports) when nIN is held
low; the switches nS2 are ON (they are connected
to common Ports Dn) when the nIN input is held
low and OFF (high impedance state exists
between the two ports) when IN is held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage. It’s available in the
commercial temperature range in the QFN
package.
July 2005
Rev. 4
1/11