STG3684A Datasheet, PDF (1/28 Pages) STMicroelectronics – Low voltage 0.5 Ω max dual SPDT switch with break-before-make

STG3684A
Low voltage 0.5 Ω max dual SPDT switch
with break-before-make
Features
■ Ultra low power dissipation:
I_CC = 0.2 μA (max.) at T_A = 85 °C
■ Low ON resistance V_IN = 0 V:
– R_ON = 0.45 Ω (max. T_A = 25 °C) at
V_CC = 4.3 V
– R_ON = 0.50 Ω (max. T_A = 25 °C) at
V_CC = 3.6 V
– R_ON = 0.50 Ω (max. T_A = 25 °C) at
V_CC = 3.0 V
■ Wide operating voltage range:
V_CC (OPR) = 1.65 to 4.3 V single supply
■ 4.3 V tolerant and 1.8 V compatible threshold
on digital control input at V_CC = 2.3 to 4.3 V
■ Latch-up performance exceeds 300 mA
(JESD 17)
■ ESD performance:
HMB > 2 kV (MIL STD 883 method 3015)
Description
The STG3684A is a high-speed CMOS dual
analog SPDT (single-pole dual-throw) switch or
dual 2:1 multiplexer/demultiplexer bus switch
fabricated using silicon gate C²MOS technology.
Designed to operate from 1.65 to 4.3 V, this
device is ideal for portable applications.
DFN10L
(2.3 x 2 mm)
QFN10L
(1.8 x 1.4 mm)
It offers very low ON resistance (R_ON < 0.5 Ω) at
V_CC = 3.0 V. The nIN inputs are provided to
control the independent channel switches nS1
and nS2. The switches nS1 are ON (connected to
common ports Dn) when the nIN input is held high
and OFF (state of high impedance exists between
the two ports) when nIN is held low. The switches
nS2 are ON (connected to common ports Dn)
when the nIN input is held low and OFF (state of
high impedance exists between the two ports)
when IN is held high. Additional key features are
fast switching speed, break-before-make delay
time and ultra low power consumption. All inputs
and outputs are equipped with protection circuits
against static discharge, giving them ESD and
excess transient voltage immunity.
Table 1. Device summary
Order code
STG3684AUTR
STG3684ADTR
November 2007
Package
QFN10L (1.8 x 1.4 mm)
DFN10L (2.3 x 2 mm)
Rev 6
Packaging
Tape and reel
Tape and reel
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