STG3680_05 Datasheet, PDF (1/11 Pages) STMicroelectronics – LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH WITH BREAK BEFORE MAKE FEATURE

STG3680
LOW VOLTAGE 0.5/0.8Ω MAX DUAL SPDT SWITCH
WITH BREAK BEFORE MAKE FEATURE
I HIGH SPEED:
t_PD = 0.3ns (TYP.) at V_CC = 3.0V
t_PD = 0.4ns (TYP.) at V_CC = 2.3V
I ULTRA LOW POWER DISSIPATION:
I_CC = 0.2µA (MAX.) at T_A = 85°C
I LOW "ON" RESISTANCE V_IN = 0V:
R_ON-S1 = 0.5Ω (MAX. T_A = 25°C) at V_CC=2.7V
R_ON-S2 = 0.8Ω (MAX. T_A = 25°C) at V_CC=2.7V
I WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 1.65V to 4.3V SINGLE SUPPLY
I 4.3V TOLERANT AND 1.8V COMPATIBLE
THRESHOLD ON DIGITAL CONTROL INPUT
at V_CC = 2.3 to 3.0V
I LATCH-UP PERFORMANCE EXCEEDS
300mA (JESD 17)
I ESD PERFORM. (ANALOG CHAN. vs GND):
HBM > 7KV (MIL STD 883 method 3015)
DESCRIPTION
The STG3680 is an high-speed CMOS DUAL
ANALOG S.P.D.T. (Single Pole Dual Throw)
SWITCH or DUAL 2:1 Multiplexer/Demultiplexer
Bus Switch fabricated in silicon gate C²MOS
technology. It is designed to operate from 1.65V to
4.3V, making this device ideal for portable
applications.
It offers very low ON-Resistance (<0.5Ω 1S1 and
2S1 channels; <0.8Ω 1S2 and 2S2 channels) at
V_CC=2.7V. The nIN inputs are provided to control
Figure 1: Pin Connection
QFN
Table 1: Order Codes
PACKAGE
QFN
T&R
STG3680QTR
the switches. The switches nS1 are ON (they are
connected to common Ports Dn) when the nIN
input is held high and OFF (high impedance state
exists between the two ports) when nIN is held
low; the switches nS2 are ON (they are connected
to common Ports Dn) when the nIN input is held
low and OFF (high impedance state exists
between the two ports) when IN is held high.
Additional key features are fast switching speed,
Break Before Make Delay Time and Ultra Low
Power Consumption. All inputs and outputs are
equipped with protection circuits against static
discharge, giving them ESD immunity and
transient excess voltage. It’s available in the
commercial temperature range in the QFN
package.
July 2005
Rev. 5
1/11