STD40NF3LL Datasheet, PDF (1/6 Pages) STMicroelectronics – N-CHANNEL 30V - 0.0095 ohm - 40A DPAK LOW GATE CHARGE STripFET POWER MOSFET

®
STD40NF3LL
N-CHANNEL 30V - 0.0095 Ω - 40A DPAK
LOW GATE CHARGE STripFET™ POWER MOSFET
TYPE
V_DSS
R_{DS(on )}
I_D
STD40NF3LL
30 V < 0.0115 Ω 40 A
s TYPICAL RDS(on) = 0.0115 Ω @ 4.5V
s OPTIMAL R_DS(on) x Q_g TRADE-OFF @ 4.5V
s CONDUCTION LOSSES REDUCED
s SWITCHING LOSSES REDUCED
DESCRIPTION
This application specific Power Mosfet is the third
generation of STMicroelectronics unique ”Single
Feature Size™” strip-based process. The resul-
ting transistor shows the best trade-off between
on-resistance and gate charge. When used as
high and low side in buck regulators, it gives the
best performance in terms of both conduction and
switching losses. This is extremely important for
motherboards where fast switching and high effi-
ciency are of paramount importance.
PRELIMINARY DATA
3
1
DPAK
TO-252
(Suffix ”T4”)
ADD SUFFIX ”T4” FOR ORDERING IN TAPE & REEL
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s SPECIFICALLY DESIGNED AND
OPTIMISED FOR HIGH EFFICIENCY CPU
CORE DC/DC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Sy mb o l
P a ramet er
V _DS
V _DGR
V_GS
I_D
ID
Drain-source Voltage (V_GS = 0)
Drain- gate Voltage (R_GS = 20 kΩ)
G ate-source Voltage
Drain Current (continuous) at T_c = 25 ^oC
Drain Current (continuous) at Tc = 100 ^oC
I_DM (•)
P_tot
Drain Current (pulsed)
T otal Dissipat ion at T_c = 25 ^oC
Derating Factor
Tstg Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
May 2000
Va l u e
30
30
± 15
40
28
160
55
0.37
-65 to 175
175
Un it
V
V
V
A
A
A
W
W /^o C
o_C
o_C
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