STD25NF10L Datasheet, PDF (1/9 Pages) STMicroelectronics – N-CHANNEL 100V - 0.030 ohm - 25A DPAK LOW GATE CHARGE STripFET™ II POWER MOSFET

STD25NF10L
N-CHANNEL 100V - 0.030 Ω - 25A DPAK
LOW GATE CHARGE STripFET™ II POWER MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STD25NF10L
100 V < 0.035 Ω
25 A
s TYPICAL R_DS(on) = 0.030 Ω
s EXCEPTIONAL dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s LOW THRESHOLD DEVICE
s LOGIC LEVEL DEVICE
s SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4")
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET process has specifically been designed
to minimize input capacitance and gate charge. It is
therefore suitable as primary switch in advanced high-
efficiency, high-frequency isolated DC-DC converters for
Telecom and Computer applications. It is also intended
for any applications with low gate drive requirements
APPLICATIONS
s HIGH-EFFICIENCY DC-DC CONVERTERS
s UPS AND MOTOR CONTROL
3
1
DPAK
TO-252
(Suffix “T4”)
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D(*)
Drain Current (continuous) at T_C = 25°C
I_D
Drain Current (continuous) at T_C = 100°C
I_DM(•) Drain Current (pulsed)
P_tot
Total Dissipation at T_C = 25°C
Derating Factor
dv/dt ⁽¹⁾ Peak Diode Recovery voltage slope
E_AS ⁽²⁾ Single Pulse Avalanche Energy
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area.
(*) Current Limited by Package
February 2003
Value
100
100
± 16
25
25
100
100
0.67
20
450
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
-55 to 175
°C
(1) I_SD ≤25A, di/dt ≤300A/µs, V_DD ≤ V_(BR)DSS, T_j ≤ T_JMAX
(2) Starting Tj = 25 ^oC, ID = 12.5A, VDD = 50V
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