STD25NF10 Datasheet, PDF (1/9 Pages) STMicroelectronics – N-CHANNEL 100V - 0.033ohm - 25A DPAK LOW GATE CHARGE STripFET™ POWER MOSFET

STD25NF10
N-CHANNEL 100V - 0.033Ω - 25A DPAK
LOW GATE CHARGE STripFET™ POWER MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STD25NF10
100 V < 0.038 Ω 25 A
s TYPICAL R_DS(on) = 0.033Ω
s EXCEPTIONAL dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s APPLICATION ORIENTED
CHARACTERIZATION
DESCRIPTION
This Power Mosfet series realized with STMicro-
electronics unique STripFET process has specifical-
ly been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters for Telecom and Computer application. It
is also intended for any application with low gate
charge drive requirements.
3
1
DPAK
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH-EFFICIENCY DC-DC CONVERTERS
s UPS AND MOTOR CONTROL
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D (*)
Drain Current (continuos) at T_C = 25°C
I_D
I_DM (l)
Drain Current (continuos) at T_C = 100°C
Drain Current (pulsed)
P_TOT
Total Dissipation at T_C = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
E_AS (2) Single Pulse Avalanche Energy
T_stg
Storage Temperature
T_j
Operating Junction Temperature
(q) Pulse width limited by safe operating area
(*) Current Limited by Package
May 2002
Value
100
100
± 20
25
21
100
100
0.67
13
480
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
–55 to 175
°C
(1) I_SD ≤35A, di/dt ≤300A/µs, V_DD ≤ V_(BR)DSS, T_j ≤ T_JMAX.
(2) Starting T_j = 25°C, I_D = 12.5A, V_DD = 50V
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