STD17N05L Datasheet, PDF (1/10 Pages) STMicroelectronics – N - CHANNEL ENHANCEMENT MODE LOW THRESHOLD POWER MOS TRANSISTOR

STD17N05L
STD17N06L
N - CHANNEL ENHANCEMENT MODE
LOW THRESHOLD POWER MOS TRANSISTOR
TYPE
STD17N05L
STD17N06L
VDSS
50 V
60 V
R DS( on)
< 0.085 Ω
< 0.085 Ω
ID
17 A
17 A
s TYPICAL R_DS(on) = 0.065 Ω
s AVALANCHE RUGGED TECHNOLOGY
s 100% AVALANCHE TESTED
s REPETITIVE AVALANCHE DATA AT 100^oC
s LOW GATE CHARGE
s LOGIC LEVEL COMPATIBLE INPUT
s 175^oC OPERATING TEMPERATURE
s APPLICATION ORIENTED
CHARACTERIZATION
s THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX ”-1”)
s SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX ”T4”)
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SOLENOID AND RELAY DRIVERS
s REGULATORS
s DC-DC & DC-AC CONVERTERS
s MOTOR CONTROL, AUDIO AMPLIFIERS
s AUTOMOTIVE ENVIRONMENT (INJECTION,
ABS, AIR-BAG, LAMPDRIVERS, Etc.)
ABSOLUTE MAXIMUM RATINGS
Symbol
P ar amete r
VD S Drain-source Voltage (VGS = 0)
V_{DG R} Drain- gate Voltage (R_GS = 20 kΩ)
VGS Gate-source Voltage
ID
Drain Current (continuous) at T c = 25 ^oC
I_D
Drain Current (continuous) at T _c = 100 ^oC
IDM(•) Drain Current (pulsed)
Ptot Total Dissipation at Tc = 25 ^oC
Derating Factor
Tstg Storage Temperature
Tj Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area
January 1995
3
2
1
IPAK
TO-251
(Suffix ”-1”)
3
1
DPAK
TO-252
(Suffix ”T4”)
INTERNAL SCHEMATIC DIAGRAM
Val ue
STD17N05L
S T D 17 N0 6L
50
60
50
60
± 15
17
12
68
55
0 .3 7
-65 to 175
175
Unit
V
V
V
A
A
A
W
W/^oC
o_C
o_C
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