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STB14NF10 Datasheet, PDF (1/11 Pages) STMicroelectronics – N-CHANNEL 100V - 0.115 ohm - 15A TO-220/TO-220FP/D2PAK LOW GATE CHARGE STripFET™ II POWER MOSFET
STB14NF10
STP14NF10 STP14NF10FP
N-CHANNEL 100V - 0.115 Ω - 15A TO-220/TO-220FP/D2PAK
LOW GATE CHARGE STripFET™ II POWER MOSFET
TYPE
VDSS
RDS(on)
ID
STB14NF10
STP14NF10
STP14NF10FP
100 V
100 V
100 V
<0.13 Ω
<0.13 Ω
<0.13 Ω
15 A
15 A
10 A
s TYPICAL RDS(on) = 0.115 Ω
s EXCEPTIONAL dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s APPLICATION ORIENTED
CHARACTERIZATION
s SURFACE-MOUNTING D2PAK (TO-263)
POWER PACKAGE IN TUBE (NO SUFFIX) OR
IN TAPE & REEL (SUFFIX “T4”)
DESCRIPTION
This MOSFET series realized with STMicroelectronics
unique STripFET™ process has specifically been de-
signed to minimize input capacitance and gate charge. It
is therefore suitable as primary switch in advanced high-
efficiency, high-frequency isolated DC-DC converters for
Telecom and Computer applications. It is also intended for
any applications with low gate drive requirements.
APPLICATIONS
s HIGH-EFFICIENCY DC-DC CONVERTERS
s UPS AND MOTOR CONTROL
3
2
1
TO-220FP
3
1
D2PAK
TO-263
(Suffix “T4”)
3
2
1
TO-220
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS
Gate- source Voltage
ID
Drain Current (continuous) at TC = 25°C
ID
Drain Current (continuous) at TC = 100°C
IDM(•) Drain Current (pulsed)
Ptot
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
EAS (2) Single Pulse Avalanche Energy
VISO
Insulation Withstand Voltage (DC)
Tstg
Storage Temperature
Tj
Operating Junction Temperature
(•) Pulse width limited by safe operating area.
June 2002
.
STB14NF10
STP14NF10
15
10
60
60
0.4
------
Value
STP14NF10FP
100
100
± 20
10
6.3
40
25
0.17
9
70
2000
Unit
V
V
V
A
A
A
W
W/°C
V/ns
mJ
V
-55 to 175
°C
(1) ISD ≤14A, di/dt ≤300A/µs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
(2) Starting Tj = 25 oC, ID = 15A, VDD= 50V
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