STA260 Datasheet, PDF (1/7 Pages) STMicroelectronics – Sirius SDARS channel, service & source decoder

STA260
Sirius SDARS channel, service & source decoder
Data Brief
Features
■ 2 Satellite and 1 terrestrial signal demodulators
and decoders
■ Advanced DSP processor to implement PAC
audio decoder
■ Requires a single 17MHz clock reference; all
high-speed clock signals are derived using
on-chip PLL
■ Programmable I²S to support 32K/48K/44.1K
audio sample rate (32K/48K Sample rates use
internal clocks, 44.1K Sample rate uses
external clock)
■ I²C master interface to control tuner and audio
DAC
■ External control through UART interface using
Sirius Standard Protocol (SSP) over RS-232
Analog to digital converters
■ Three internal 10 BIT A/D converters for
76.5MHZ if signals conversion
Low power technology
■ 1.2V, 90 µm technology
■ 2.5V capable I/OS
LFBGA289
(15x15x1.4mm)
VFBGA244
(8x8x1.0mm)
Description
STA260 is a fully integrated 3rd generation
Baseband signal processor for Sirius Satellite
Digital Audio Radio Service (SDARS). It is
implemented using ST Micro's advanced 90 µm
CMOS090 technology.
It allows a highly efficient implementation of a
Sirius “SDARS Satellite Digital Audio Radio
Service” receiver when used with its companion
STA210 tuner ASIC.
STA260 is packaged in a Low profile Fine pitch
Ball Grid Array (LFBGA 15x15) and in Very thin
Fine pitch Ball Grid Array (VFBGA 8x8).
Table 1. Device summary
Part Number⁽¹⁾
Package
STA260
STA260TR
STA260-8x8
LFBGA289
LFBGA289
VFBGA244
1. This device is Pb-Free ECOPACK® see Chapter 3: Package information.
Packing
Tray
Tape & reel
Tray
June 2007
Rev 1
For further information contact your local STMicroelectronics sales office.
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