STA2500D_10 Datasheet, PDF (1/58 Pages) STMicroelectronics – Bluetooth™ V2.1 + EDR ("Lisbon") for automotive applications

STA2500D
Bluetooth™ V2.1 + EDR ("Lisbon") for automotive applications
Features
■ Based on Ericsson technology licensing
baseband core (EBC)
■ Bluetooth™ specification compliance:
V2.1 + EDR (“Lisbon”)
– Point-to-point, point-to-multipoint (up to 7
slaves) and scatternet capability
– Support ACL and SCO links
– Extended SCO (eSCO) links
– Faster connection
■ HW support for packet types
– ACL: DM1, DM3, DM5, DH1, DH3, DH5, 2-
DH1, 2-DH3, 2-DH5, 3-DH1, 3-DH3, 3-DH5
– SCO: HV1, HV3 and DV
– eSCO: EV3, EV4, EV5, 2-EV3, 2-EV5, 3-
EV3, 3-EV5
■ Adaptive frequency hopping (AFH)
■ Channel quality driven data rate (CQDDR)
■ “Lisbon” features
– Encryption pause/resume (EPR)
– Extended inquiry response (EIR)
– Link supervision time out (LSTO)
– Secure simple pairing
– Sniff subrating
– Quality of service (QoS)
Packet boundary flag
Erroneous data delivery
■ Transmit power
– Power class 2 and power class 1.5 (above
4 dBm)
– Programmable output power
– Power class 1 compatible
■ HCI
– HCI H4 and enhanced H4 transport layer
– HCI proprietary commands (e.g.
peripherals control)
– Single HCI command for patch/upgrade
download
– eSCO over HCI supported
■ Supports pitch-period error concealment (PPEC)
■ Efficient and flexible support for WLAN
coexistence scenarios
LFBGA48 (6x6x1.4mm; 0.8mm Pitch)
■ Low power consumption
– Ultra low power architecture with 3 different
low-power levels
– Deep sleep modes, including host-power
saving feature
– Dual wake-up mechanism: initiated by the
host or by the Bluetooth device
■ Communication interfaces
– Fast UART up to 4 MHz
– Flexible SPI interface up to 13 MHz
– PCM interface
– Up to 10 additional flexibly programmable
GPIOs
– External interrupts possible through the
GPIOs
– Fast I²C interface as master
■ Clock support
– System clock input (digital or sine wave) at
9.6, 10, 13, 16, 16.8, 19.2, 26, 33.6 or 38.4 MHz
– Low power clock input at 3.2 kHz, 32 kHz
and 32.768 kHz
■ ARM7TDMI CPU
■ Memory organization
– On chip RAM, including provision for
patches
– On chip ROM, preloaded with SW up to
HCI
■ Ciphering support up to 128-bit key
■ Single power supply with internal regulators for
core voltage generation
■ Supports 1.65 V to 2.85 V I/O systems
■ Auto calibration (VCO, filters)
January 2010
Doc ID 16067 Rev 2
1/58
www.st.com
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