ST9291 Datasheet, PDF (1/20 Pages) STMicroelectronics – 16-48K ROM HCMOS MCU WITH ON SCREEN DISPLAY AND VOLTAGE TUNINGOUTPUT

®
ST9291
16-48K ROM HCMOS MCU WITH
ON SCREEN DISPLAY AND VOLTAGE TUNING OUTPUT
FUNCTIONAL DESCRIPTION
Register oriented 8/16 bit CORE with
RUN, WFI and HALT modes
Minimum instruction cycle time: 500ns
(12MHz internal)
16 to 48K bytes of ROM,
384/640 bytes of RAM,
224 general purpose registers available as RAM,
accumulators or index registers (Register File)
42-lead Shrink DIP package or
56-lead Shrink DIP package
Interrupt handler and Serial Peripheral Interface
as standard features
31 (42 pin package) / 42 (56 pin package) fully
programmable I/O pins
34 character x15 rows software programmable
On Screen Display module with colour, italic, un-
derline, flash, transparent and fringe attribute
options
14-bit Voltage Synthesis for tuning reference
voltage.
8 8-bit PWM D/A outputs with repetition frequency
2 to 32kHz and 12V Open Drain Capability
16 bit Timer with 8 bit Prescaler, able to be used
as a Watchdog Timer
16-bit programmable Slice Timer with 8-bit pres-
caler
3 channel Analog to Digital Converter, with inte-
gral sample and hold, fast 5.75µs conversion
time, 6-bit guaranteed resolution
Rich Instruction Set and 14 Addressing modes
Division-by-Zero trap generation
Versatile Development tools, including assembler,
linker, C-compiler, archiver, graphic oriented de-
bugger and hardware emulators
Real Time Operating System
Windowed EPROM parts available for prototyp-
ing and pre-production development phases
PSDIP42
PSDIP56
(Ordering Information at the end of the Datasheet)
DEVICE SUMMARY
Device
ST9291J2/N2
ST9291J3/N3
ST9291J4/N4
ST9291J5/N5
ST9291J6/N6
ST9291J7/N7
ROM
16K
16K
24K
24K
32K
48K
RAM
384
640
384
640
640
640
PACKAGE
PSDIP42/56
PSDIP42/56
PSDIP42/56
PSDIP42/56
PSDIP42/56
PSDIP42/56
July 1995
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