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ST4G3235 Datasheet, PDF (1/13 Pages) STMicroelectronics – 4-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR WITH A SIDE SERIES RESISTOR
ST4G3235
4-BIT DUAL SUPPLY BUS BUFFER LEVEL TRANSLATOR
WITH A SIDE SERIES RESISTOR
I HIGH SPEED: tPD = 4.3ns (MAX.) at TA=85°C
VCCB = 1.65V; VCCA = 3.0V
I LOW POWER DISSIPATION:
ICCA = ICCB = 5µA(MAX.) at TA=85°C
I SYMMETRICAL OUTPUT IMPEDANCE:
|IOHA| = IOLA = 10mA MIN at
VCCA = 2.75V; VCCB = 1.4V to 3.6V
|IOHB| = IOLB = 4mA MIN at
VCCB = 1.65V; VCCA = 1.4 to 3.6V)
I BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
I POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
I 26Ω SERIES RESISTOR ON A SIDE OUTPUTS
I OPERATING VOLTAGE RANGE:
VCCA(OPR) = 1.4V to 3.6V (1.2V Data Retent)
VCCB(OPR) = 1.4V to 3.6V (1.2V Data Retent)
I MAX DATA RATES:
380 Mbps (1.8V to 3.3V translation)
260 Mbps (<1.8V to 3.3V translation)
260 Mbps (Translate to 2.5V)
210 Mbps (Translate to 1.5V)
I LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
I ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
I ROHS Compliant for FLIPCHIP Package
DESCRIPTION
The ST4G3235 is a dual supply low voltage
CMOS 4-BIT BUS BUFFER level translator
fabricated with sub-micron silicon gate and
five-layer metal wiring C2MOS technology.
Designed for use as an interface between a 3.3V
bus and a 2.5V or 1.8V bus in a mixed 3.3V/1.8V,
3.3V/2.5V, 1.8V/1.4V and 2.5V/1.8V supply
systems, it achieves high speed operation while
maintaining the CMOS low power dissipation.
This IC is intended for one-way asynchronous
communication between data buses. The input
and output power down protections disable the
device when both power supply are down, so that
the buses are effectively isolated.
The input tolerant buffers allow to translate VCCB
compatible signals and greater signals than VCCB
up/down to VCCA and viceversa.
May 2005
FLIPCHIP
Table 1: Order Codes
PACKAGE
T&R
FLIPCHIP11 ST4G3235BJR
Comments
5000 parts per reel
All inputs are equipped with protection circuits
against static discharge, giving them ESD immuni-
ty and transient excess voltage.
Figure 1: Logic Diagram
Rev. 6
1/13