ST1305 Datasheet, PDF (1/2 Pages) STMicroelectronics – High Endurance CMOS 192 bit EEPROM With Secure Logic Access Control

ST1305
High Endurance CMOS 192 bit EEPROM
With Secure Logic Access Control
BRIEF DATA
s Single 5 V Supply Voltage
Figure 1. Delivery Forms
s Programming Time: 5 ms
s Memory Divided Into:
– 16 bits of Circuit Identification
– 48 bits of Card Identification
– 48 bits of Count Data
– 16 bits of Certificate
– 48 bits of Transport Code
– 64 bits of Issuer Data
s Counting Capability up to 262,144 Units
Micromodule
s Circuit Protected by Transport Code for Delivery
from ST to the Customer
s 5 External Contacts Only (ISO 7816 Compatible)
Figure 2. Pin Connection
s Answer to Reset (Fully Compatible with ISO 7816-3)
VCC
s E.S.D. Protection Greater Than 4000 V
s Power-On and Low V_CC Reset
s 10 Years Data Retention
s 1 Million Erase/Write Cycles Endurance
RST
Wafer
DESCRIPTION
ST1305
I/O
The ST1305 is a 192-bit EEPROM device with associat-
CLK
ed security logic to control memory access. The circuit
includes counting capabilities and thus is very well
adapted to prepaid card applications.
The ST1305 is protected by hard-wired security logic
and special fuses. The memory is arranged as a matrix
GND
of 24x8 cells, accessed in a serial bit-wise fashion for
reading and programming, and in a byte-wise fashion ^{Table 1. Signal Names}
for internal erasing.
CLK
Clock
AI01032
The device recognises three commands issued via the _RST
RST and CLK pins (as described in the full data sheet):
– RESET: to reset the internal address register to 00d ^I/O
– READ: to increment the internal address register, ^VCC
and read the data bit at that address
GND
– PROG: to program the bit at the current address.
Reset
Serial Data Input/Output
Supply Voltage
Ground
BD.05/9803V1
1/2