PSD813F2A-90JI Datasheet, PDF (1/128 Pages) STMicroelectronics – Flash in-system programmable (ISP) peripherals

PSD8XXFX
Flash in-system programmable (ISP)
peripherals for 8-bit MCUs, 5 V
Features
■ Flash in-system programmable (ISP)
peripheral for 8-bit MCUs
■ Dual bank Flash memories
) _{– Up to 2 Mbit of primary Flash memory (8}
t(s ^{uniform sectors, 32K x8)}
c – Up to 256 Kbit secondary Flash memory (4
u _{uniform sectors)}
rod ^{– Concurrent operation: read from one}
memory while erasing and writing the other
P _{■ Up to 256 Kbit SRAM}
te _{■ 27 reconfigurable I/Oports}
ole ^{■ Enhanced JTAG serial port}
s _{■ PLD with macrocells}
Ob ^{– Over 3000 gates of PLD: CPLD and DPLD}
- – CPLD with 16 output macrocells (OMCs)
) _{and 24 input macrocells (IMCs)}
t(s ^{– DPLD - user defined internal chip select}
c decoding
du ^{■ 27 individually configurable I/O port pins}
ro ^{They can be used for the following functions:}
– MCU I/Os
P _{– PLD I/Os}
te _{– Latched MCU address output}
le _{– Special function I/Os.}
so _{– 16 of the I/O ports may be configured as}
Ob ^{open-drain outputs.}
PQFP52 (M)
PLCC52 (J)
TQFP64 (U)
■ Programmable power management
■ Packages are ECOPACK^®
Table 1. Device summary
Reference
Part number
PSD813F2
PSD813F4
■ In-system programming (ISP) with JTAG
– Built-in JTAG compliant serial port allows
PSD813F5
full-chip in-system programmability
PSD8XXFX
PSD833F2
– Efficient manufacturing allow easy product
testing and programming
– Use low cost FlashLINK cable with PC
■ Page register
PSD834F2
PSD853F2
PSD854F2
– Internal page register that can be used to
expand the microcontroller address space
by a factor of 256
May 2009
Doc ID 7833 Rev 7
1/128
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