M74HCT74-1 Datasheet, PDF (1/10 Pages) STMicroelectronics – DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

M74HCT74
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
s HIGH SPEED :
f_MAX = 48MHz (TYP.) at V_CC = 4.5V
s LOW POWER DISSIPATION:
I_CC =2µA(MAX.) at T_A=25°C
s COMPATIBLE WITH TTL OUTPUTS :
V_IH = 2V (MIN.) V_IL = 0.8V (MAX)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
DESCRIPTION
The M74HCT74 is an high speed CMOS DUAL D
TYPE FLIP FLOP WITH CLEAR fabricated with
silicon gate C²MOS technology.
A signal on the D INPUT (nD) is transferred on the
Q OUTPUT during the positive going transition of
the clock pulse. CLEAR (CLR) and PRESET (PR)
are independent of the clock and accomplished by
a low on the appropriate input.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HCT74B1R
M74HCT74M1R
T&R
M74HCT74RM13TR
M74HCT74TTR
The M74HCT74 is designed to directly interface
HSC²MOS systems with TTL and NMOS
components.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
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