M74HCT374 Datasheet, PDF (1/11 Pages) STMicroelectronics – OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT NON INVERTING

M74HCT374
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT NON INVERTING
s HIGH SPEED:
f_MAX = 50 MHz (TYP.) at V_CC = 4.5V
s LOW POWER DISSIPATION:
I_CC = 4µA(MAX.) at T_A=25°C
s COMPATIBLE WITH TTL OUTPUTS :
V_IH = 2V (MIN.) V_IL = 0.8V (MAX)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 6mA (MIN)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 374
DESCRIPTION
The M74HCT374 is an high speed CMOS OCTAL
D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS
NON INVERTING fabricated with silicon gate
C²MOS technology.
This 8 bit D-TYPE FLIP FLOP is controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic state that were
setup at the D inputs.
While the OE input is at low level, the eight outputs
will be in a normal logic state (high or low logic
level) and while OE is at high level the outputs will
be in a high impedance state.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
TSSOP
M74HCT374B1R
M74HCT374M1R M74HCT374RM13TR
M74HCT374TTR
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
The M74HCT374 is designed to directly interface
HSC²MOS systems with TTL and NMOS
components.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/11