M74HC74-1 Datasheet, PDF (1/12 Pages) STMicroelectronics – DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR

M74HC74
DUAL D TYPE FLIP FLOP WITH PRESET AND CLEAR
s HIGH SPEED :
f_MAX = 67MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC =2µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28 % V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 74
DESCRIPTION
The M74HC74 is an high speed CMOS DUAL D
TYPE FLIP FLOP WITH CLEAR fabricated with
silicon gate C²MOS technology.
A signal on the D INPUT is transferred on the Q
OUTPUT during the positive going transition of the
clock pulse. CLEAR and PRESET are
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC74B1R
M74HC74M1R
T&R
M74HC74RM13TR
M74HC74TTR
independent of the clock and accomplished by a
low on the appropriate input.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/12