M74HC564 Datasheet, PDF (1/11 Pages) STMicroelectronics – OCTAL D-TYPE FLIP FLOP WITH 3 STATE OUTPUT INVERTING

M74HC564
OCTAL D-TYPE FLIP FLOP
WITH 3 STATE OUTPUT INVERTING
s HIGH SPEED:
f_MAX = 90MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC = 4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28 % V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 6mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 564
DESCRIPTION
The M74HC564 is an high speed CMOS OCTAL
D-TYPE FLIP FLOP WITH 3-STATE OUTPUTS
INVERTING fabricated with silicon gate C²MOS
technology.
This 8 bit D-TYPE FLIP FLOP is controlled by a
clock input (CK) and an output enable input (OE).
On the positive transition of the clock, the Q
outputs will be set to the logic state that were
setup at the D inputs.
While the OE input is at low level, the eight outputs
will be in a normal logic state (high or low logic
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC564B1R
M74HC564M1R
T&R
M74HC564RM13TR
M74HC564TTR
level) and while high level the outputs will be in a
high impedance state.
The output control does not affect the internal
operation of flip-flops; that is, the old data can be
retained or the new data can be entered even
while the outputs are off.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
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