M74HC4518 Datasheet, PDF (1/11 Pages) STMicroelectronics – DUAL DECADE COUNTER

M74HC4518
DUAL DECADE COUNTER
s HIGH SPEED :
f_MAX = 60 MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC =4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28 % V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 4518
DESCRIPTION
The M74HC4518 is an high speed CMOS DUAL
BINARY COUNTER fabricated with silicon gate
C²MOS technology.
It consist of two identical internally synchronous
4-stage counters. The counter stages are D-TYPE
flip-flops having interchangeable CLOCK and
ENABLE inputs for incrementing on either the
positive-going or negative-going transition.
For single-unit operation the ENABLE input is
maintained "high" and the counter advances on
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
T&R
DIP
SOP
TSSOP
M74HC4518B1R
M74HC4518M1R M74HC4518RM13TR
M74HC4518TTR
each positive-going transition of the CLOCK. The
counters are cleared by high levels on their clear
lines.
The counter can be cascaded in the ripple mode
by connecting Q4 to the enable input of the
subsequent counter while the clock input of the
latter is held permanently low.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
1/11