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M74HC279 Datasheet, PDF (1/10 Pages) STMicroelectronics – QUAD S - R LATCH
M74HC279
QUAD S - R LATCH
s HIGH SPEED:
tPD = 13ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC =2µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 279
DESCRIPTION
The M74HC279 is an high speed CMOS QUAD
S - R LATCH fabricated with silicon gate C2MOS
technology.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC279B1R
M74HC279M1R
T&R
M74HC279RM13TR
M74HC279TTR
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
August 2001
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