M74HC192 Datasheet, PDF (1/14 Pages) STMicroelectronics – SYNCHRONOUS UP/DOWN DECADE COUNTER

M74HC192
SYNCHRONOUS UP/DOWN DECADE COUNTER
s HIGH SPEED :
f_MAX = 55 MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC =4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28 % V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 192
DESCRIPTION
The M74HC192 is an high speed CMOS
SYNCRONOUS
UP/DOWN
DECADE
COUNTERS fabricated with silicon gate C²MOS
technology.
The counter has two separate clock inputs, an UP
COUNT input and a DOWN COUNT input. All
outputs of the flip-flop are simultaneously
triggered on the low to high transition of either
clock while the other input is held high. The
direction of counting is determined by which input
is clocked. This counter may be preset by entering
the desired data on the DATA A, DATA B, DATA
C, and DATA D input. When the LOAD input is
taken low the data is loaded independently of
either clock input. This feature allows the counters
to be used as divide-by-n counters by modifying
the count length with the preset inputs. In addition
PIN CONNECTION AND IEC LOGIC SYMBOLS
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC192B1R
M74HC192M1R
T&R
M74HC192RM13TR
M74HC192TTR
the counter can also be cleared. This is
accomplished by inputting a high on the CLEAR
input. All 4 internal stages are set to low
independently of either COUNT input. Both a
BORROW and CARRY output are provided to
enable cascading of both up and down counting
functions. The BORROW output produces a
negative going pulse when the counter underflows
and the CARRY outputs a pulse when the
counters overflows. The counter can be cascaded
by connection the CARRY and BORROW outputs
of one device to the COUNT UP and COUNT
DOWN inputs, respectively, of the next device.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
July 2001
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