M74HC166 Datasheet, PDF (1/12 Pages) STMicroelectronics – 8 BIT PISO SHIFT REGISTER

M74HC166
8 BIT PISO SHIFT REGISTER
s HIGH SPEED :
f_MAX = 63 MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC =4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28 % V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 166
DESCRIPTION
The M74HC166 is an high speed CMOS 8 BIT
PISO SHIFT REGISTER fabricated with silicon
gate C²MOS technology.
It consists of parallel or serial inputs and a
serial-out 8 bit shift register with gated clock inputs
and an overriding clear input. The parallel-in or
serial-in modes are controlled by the SHIFT/
LOAD input. When the SHIFT/LOAD input is held
high, the serial data input is enabled and the eight
flip-flops perform serial shifting with each clock
pulse; when held low, the parallel data inputs are
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC166B1R
M74HC166M1R
T&R
M74HC166RM13TR
M74HC166TTR
enabled and synchronous loading occurs on the
next clock pulse. Clocking is accomplished on the
low-to-high level edge of the clock pulse. The
CLOCK-INHIBIT input should be changed to the
high only while the clock input is held high. A direct
clear input overrides all other inputs, including the
clock, and sets all flip-flops to zero. Functional
details are shown in the truth table and the timing
chart. All inputs are equipped with protection
circuits against static discharge and transient
excess voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
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