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M74HC148 Datasheet, PDF (1/11 Pages) STMicroelectronics – 8 TO 3 LINE PRIORITY ENCODER
M74HC148
8 TO 3 LINE PRIORITY ENCODER
s HIGH SPEED:
tPD = 16ns (TYP.) at VCC = 6V
s LOW POWER DISSIPATION:
ICC = 4µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s WIDE OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 148
DESCRIPTION
The M74HC148 is an high speed CMOS 8 TO 3
LINE PRIORITY ENCODER fabricated with
silicon gate C2MOS technology.
The M74HC148 encodes eight data lines to
three-line (4-2-1) binary (octal). Cascading
circuitry (enable input EI and enable output EO)
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
TSSOP
M74HC148B1R
M74HC148M1R
T&R
M74HC148RM13TR
M74HC148TTR
has been provided to allow octal expansion
without the need for external circuitry. Data inputs
are active at the low logic level.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
July 2001
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