M54HCT393 Datasheet, PDF (1/12 Pages) STMicroelectronics – DUAL BINARY COUNTER

M54HCT393
M74HCT393
. HIGH SPEED
fMAX = 80 MHz (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 4 µA (MAX.) AT T_A = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS393
DUAL BINARY COUNTER
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCT393F1R M74HCT393M1R
M74HCT393B1R M74HCT393C1R
DESCRIPTION
The M54/74HCT393 is a high speed CMOS DUAL
BINARY COUNTER fabricated in silicon gate
C²MOS technology. It has the same high speed
performance of LSTTL combined with true COMS
low power consumption.
This counter circuit contains independent ripple
carry counters and two 4-bit ripple carry binary
counters, which can be cascated to create a single
divide by 256 counter.
Each 4-bit counter is incremented on the high to low
transition (negative edge) of the clock input,and
each has an independent clear input. When clear is
set to high all four bits of each counter are set to a
low level. This enables count truncation and allows
the implementation of divide by N counter
configurations.
This integrated circuit has input and output
characteristics that are fully compatible with 54/74
LSTTL logic families. M54/74HCT devices are
designed to directly interface HSC²MOS systems
with TTL and NMOS components. They are also
plug in replacements for LSTTL devices giving a
reduction of power consumption.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTIONS (top view)
NC =
No Internal
Connection
October 1993
1/12