M54HCT367 Datasheet, PDF (1/11 Pages) STMicroelectronics – HEX BUS BUFFER 3-STATE HCT367 NONINVERTING, HCT368 INVERTING

M54/M74HCT367
M54/M74HCT368
HEX BUS BUFFER (3-STATE)
HCT367 NON INVERTING, HCT368 INVERTING
. HIGH SPEED
tPD = 11 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 4 µA (MAX.) AT T_A = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS367/368
B1R
(Plastic Package)
M 1R
(Micro Package)
F1R
(Ceramic Package)
C1R
(Chip Carrier)
DESCRIPTION
ORDER CODES :
M54HCTXXXF1R M74HCTXXXM1R
M74HCTXXXB1R M74HCTXXXC1R
The M54/74HCT367 and the M54/74HCT368 are
high speed CMOS HEX BUS BUFFER (3-STATE)
fabricated in silicon gate C²MOS technology. They
have the same high speed performance of LSTTL
combined with true CMOS low power consumption.
These devices contain six buffers, four buffers are
controlled by an enable input (G1) and the other two
buffers are controlled by the other enable input
(G2) ; the outputs of each buffer group are enabled
when G1 and/or G2 inputs are held low, and
when held high these outputs are disabled to be
high-impedance.
PIN CONNECTIONS (top view)
HCT368
These outputs are capable of driving up to 15 LSTTL
loads. The designer has a choice of non-inverting
outputs (HCT367) and inverting outputs (HCT368).
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
H CT 3 67
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC²MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
February 1993
1/11