M54HCT32 Datasheet, PDF (1/9 Pages) STMicroelectronics – QUAD 2-INPUT OR GATE

. HIGH SPEED
tPD = 12 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 1 µA (MAX.) AT T_A = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS32
DESCRIPTION
The M54/74HCT32 is a high speed CMOS 2-INPUT
OR GATE fabricated in silicon gate C2MOS technol-
ogy. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. It achieves the high speed operation similar
to equivalent LSTTL while maintaining the CMOS low
power dissipation. The internal circuit is composed of
2 stages including buffered output, which gives high
noise immunity and a stable output. All inputs are
equipped with protection circuits against static dis-
charge and transient excess voltage.
This integrated circuit has input and output charac-
teristics that are fully compatible with 54/74 LSTTL
logic families. M54/74HCT devices are designed to
directly interface HSC2MOS systems with TTL and
NMOS components. They are also plug in replace-
ments for LSTTL devices giving a reduction of
power consumption.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
M54HCT32
M74HCT32
QUAD 2-INPUT OR GATE
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCT32F1R
M74HCT32M1R
M74HCT32B1R
M 74H CT 3 2C 1R
PIN CONNECTIONS (top view)
February 1993
NC =
No Internal
Connection
1/9