M54HCT245_04 Datasheet, PDF (1/10 Pages) STMicroelectronics – RAD HARD OCTAL BUS TRANSCEIVER WITH 3 STATE OUTPUTS (NON INVERTED)

M54HCT245
RAD HARD OCTAL BUS TRANSCEIVER
WITH 3 STATE OUTPUTS (NON INVERTED)
s HIGH SPEED:
t_PD = 13ns (TYP.) at V_CC = 4.5V
s LOW POWER DISSIPATION:
I_CC = 4µA(MAX.) at T_A=25°C
s COMPATIBLE WITH TTL OUTPUTS:
V_IH = 2V (MIN.) V_IL = 0.8V (MAX)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 6mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 245
s SPACE GRADE-1: ESA SCC QUALIFIED
s 50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s DEVICE FULLY COMPLIANT WITH
SCC-9405-014
DESCRIPTION
The M54HCT245 is an advanced high-speed
CMOS OCTAL BUS TRANSCEIVER (3-STATE)
fabricated with silicon gate C²MOS technology.
This IC is intended for two-way asynchronous
communication between data buses, and the
DILC-20
FPC-20
ORDER CODES
PACKAGE
FM
DILC
FPC
M54HCT245D
M54HCT245K
EM
M54HCT245D1
M54HCT245K1
direction of data transmission is determined by
DIR input. The enable input G can be used to
disable the device so that the buses are effectively
isolated.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
All floating bus terminals during High Z State must
be held HIGH or LOW.
PIN CONNECTION
June 2004
Rev. 1
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