M54HCT139 Datasheet, PDF (1/9 Pages) STMicroelectronics – DUAL 2 TO 4 DECODER/DEMULTIPLEXER

M54HCT139
M74HCT139
DUAL 2 TO 4 DECODER/DEMULTIPLEXER
. HIGH SPEED
tPD = 17 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 4 µA (MAX.) AT T_A = 25 °C
. COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN.) VIL = 0.8V (MAX)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS139
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
DESCRIPTION
The M54/74HCT139 is a high speed CMOS DUAL
TWO LINE TO FOUR LINE DECODER/DEMULTI-
PLEXER fabricated in silicon gate C2MOS technol-
ogy. It has the same high speed performance of
LSTTL combined with true CMOS low power con-
sumption. The active low enable input can be used for
gating or as a data input for demultiplexing applica-
tions. While the enable input is held high, all four out-
puts are high independently of the other inputs. All
inputs are equipped with protection circuits against
static discharge and transient excess volt-age.This in-
tegrated circuit has input and output characteristics
that are fully compatible with 54/74 LSTTL logic
families. M54/74HCT devices are designed to directly
interface HSC²MOS systems with TTL and NMOS
components. They are also plug in replacements for
ORDER CODES :
M54HCT139F1R M74HCT139M1R
M74HCT139B1R M74HCT139C1R
PIN CONNECTIONS (top view)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
February 1993
NC =
No Internal
Connection
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