M54HC597_04 Datasheet, PDF (1/14 Pages) STMicroelectronics – RAD-HARD 8 BIT LATCH/SHIFT REGISTER

M54HC597
RAD-HARD 8 BIT LATCH/SHIFT REGISTER
s HIGH SPEED:
f_MAX = 50 MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC =4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28% V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 597
s SPACE GRADE-1: ESA SCC QUALIFIED
s 50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s DEVICE FULLY COMPLIANT WITH
SCC-9306-054
DESCRIPTION
The M54HC597 is an high speed CMOS 8 BIT
PIPO SHIFT REGISTER fabricated with silicon
gate C²MOS technology.
DILC-16
FPC-16
ORDER CODES
PACKAGE
FM
DILC
FPC
M54HC597D
M54HC597K
EM
M54HC597D1
M54HC597K1
This devices comes in a 16-pin package and
consist of an 8-bit storage latch feeding a parallel
in, serial out 8-bit shift register. Both the storage
register and shift register have positive edge
triggered clocks. The shift register also has direct
load (from storage) and clear inputs.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION
June 2004
Rev. 1
1/14