M54HC590 Datasheet, PDF (1/16 Pages) STMicroelectronics – RAD-HARD 8 BINARY COUNTER REGISTER WITH 3 STATE OUTPUT

M54HC590
RAD-HARD 8 BINARY COUNTER REGISTER
WITH 3 STATE OUTPUT
s HIGH SPEED:
f_MAX = 61 MHz (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC = 4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28% V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 6mA (MIN) for QA ~ QH OUTPUT
|I_OH| = I_OL = 4mA (MIN) for RCO OUTPUT
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 590
s SPACE GRADE-1: ESA SCC QUALIFIED
s 50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s DEVICE FULLY COMPLIANT WITH
SCC-9204-071
DESCRIPTION
The M54HC590 is an high speed CMOS 8-BIT
BINARY COUNTER REGISTER (3 STATE)
fabricated with silicon gate C²MOS technology.
This device contains an 8-bit binary counter that
feeds an 8-bit storage register. The storage
DILC-16
FPC-16
ORDER CODES
PACKAGE
FM
DILC
FPC
M54HC590D
M54HC590K
EM
M54HC590D1
M54HC590K1
register has parallel outputs. Separate clocks are
provided for both the binary counter and storage
register. The binary counter features a direct clear
input CCLR and a count enable input CCKEN. For
cascading, a ripple carry output RCO is provided.
Expansion is easily accomplished by tying RCO of
the first stage to CCKEN of the second stage, etc.
Both the counter and register clocks are positive
edge triggered. If the user wishes to connect both
clocks together, the counter state will always be
one count ahead of the register. Internal circuitry
prevents clocking from the clock enable. All inputs
are equipped with protection circuits against static
discharge and transient excess voltage.
PIN CONNECTION
June 2004
Rev. 1
1/16