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M54HC367 Datasheet, PDF (1/11 Pages) STMicroelectronics – HEX BUS BUFFER 3-STATE HC367 NON INVERTING, HC368 INVERTING
M54/M74HC367
M54/M74HC368
HEX BUS BUFFER (3-STATE)
HC367 NON INVERTING, HC368 INVERTING
. HIGH SPEED
tPD = 11 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
|IOH| = IOL = 6 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS367/368
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HCXXXF1R M74HCXXXM1R
M74HCXXXB1R M74HCXXXC1R
PIN CONNECTIONS (top view)
HC368
DESCRIPTION
The M54/74HC367 and the M54/74HC368 are high
speed CMOS HEX BUS BUFFER (3-STATE) fabri-
cated in silicon gate C2MOS technology. They have
the same high speed performance of LSTTL com-
bined with true CMOS low power consumption.
These devices contain six buffers, four buffers are
controlled by an enable input (G1) and the other two
buffers are controlled by the other enable input
(G2) ; the outputs of each buffer group are enabled
when G1 and/or G2 inputs are held low, and
when held high these outputs are disabled to be
high-impedance.
These outputs are capable of driving up to 15 LSTTL
loads. The designer has a choice of non-inverting
outputs (HC367) and inverting outputs (HC368).
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
HC367
October 1992
1/11