M54HC27 Datasheet, PDF (1/9 Pages) STMicroelectronics – TRIPLE 3-INPUT NOR GATE

M54HC27
M74HC27
. HIGH SPEED
tPD = 7 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 1 µA (MAX.) AT T_A = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE WITH
54/74LS27
TRIPLE 3-INPUT NOR GATE
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC27F1R
M 74H C2 7M 1R
M 74HC 27 B1 R
M 74H C2 7C 1R
DESCRIPTION
The M54/74HC27 is a high speed CMOS TRIPLE
3-INPUT NOR GATE fabricated in silicon gate
C²MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
The internal circuit is composed of 3 stages includ-
ing buffered output, which gives high noise immunity
and a stable output. All inputs are equipped with pro-
tection circuits against static discharge and transient
excess voltage.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN CONNECTIONS (top view)
February 1993
NC =
No Internal
Connection
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