M54HC155 Datasheet, PDF (1/11 Pages) STMicroelectronics – DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER

M54HC155
M74HC155
DUAL 2 TO 4 LINE DECODER 3 TO 8 LINE DECODER
. HIGH SPEED
tPD = 12 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 4 µA (MAX.) AT T_A = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS155
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 15 5F 1R
M 74H C1 55 M1 R
M 74HC 15 5B 1R
M 74H C1 55 C1 R
PIN CONNECTIONS (top view)
DESCRIPTION
The M54/74HC155 is a high speed CMOS DUAL 2-
TO-4 LINE DECODER fabricated in silicon gate
C²MOS technology.
It has the same high speed performance of LSTTL
combined with true CMOS low power consumption.
It features dual 1-TO-4 line demultiplexers with indi-
vidual strobe inputs (1G and 2G), individual data in-
puts (1C and 2C) and common binary address
inputs (A and B).
When both decoders are enabled by the strobes, the
inverted output of 1C data and non-inverted output
of 2C data will be brought to the select output pins
of each sections. A 1-TO-8 line demultiplexer can
also be easily built up by providing a data signal to
both 1C and 2C inputs ; the output order from the
msb is 1Y3, 1Y2, 1Y1, 1Y0, 2Y3, 2Y2, 2Y1, 2Y0.
This device can be used as a 2-to-4 line decoder or
a 3-to-8 line decoder when 1C is held high and 2C
is held low.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
NC =
No Internal
Connection
December 1992
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