M54HC148_04 Datasheet, PDF (1/10 Pages) STMicroelectronics – RAD-HARD 8 TO 3 LINE PRIORITY ENCODER

M54HC148
RAD-HARD 8 TO 3 LINE PRIORITY ENCODER
s HIGH SPEED:
t_PD = 16ns (TYP.) at V_CC = 6V
s LOW POWER DISSIPATION:
I_CC = 4µA(MAX.) at T_A=25°C
s HIGH NOISE IMMUNITY:
V_NIH = V_NIL = 28% V_CC (MIN.)
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 4mA (MIN)
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s WIDE OPERATING VOLTAGE RANGE:
V_CC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
54 SERIES 148
s SPACE GRADE-1: ESA SCC QUALIFIED
s 50 krad QUALIFIED, 100 krad AVAILABLE ON
REQUEST
s NO SEL UNDER HIGH LET HEAVY IONS
IRRADIATION
s DEVICE FULLY COMPLIANT WITH
SCC-9410-017
DESCRIPTION
The M54HC148 is an high speed CMOS 8 TO 3
LINE PRIORITY ENCODER fabricated with
silicon gate C²MOS technology.
DILC-16
FPC-16
ORDER CODES
PACKAGE
FM
DILC
FPC
M54HC148D
M54HC148K
EM
M54HC148D1
M54HC148K1
The M54HC148 encodes eight data lines to
three-line (4-2-1) binary (octal). Cascading
circuitry (enable input EI and enable output EO)
has been provided to allow octal expansion
without the need for external circuitry. Data inputs
are active at the low logic level.
All inputs are equipped with protection circuits
against static discharge and transient excess
voltage.
PIN CONNECTION
March 2004
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