M54HC133 Datasheet, PDF (1/10 Pages) STMicroelectronics – 13 INPUT NAND GATE

. HIGH SPEED
tPD = 13 ns (TYP.) at VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 1 µA (MAX.) at T_A = 25° C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OutpuT IMPEDANCE
|IOH| = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V to 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS133
DESCRIPTION
The M54/74HC133 is a high speed CMOS 13-
INPUT NAND GATE fabricated in silicon gate
C²MOS technology. It has the same high speed per-
formance of LSTTL combined with true CMOS low
power consumption.
The internal circuit is composed of 7 stages includ-
ing buffer output, which gives high noise immunity
and stable output. All inputs are equipped with pro-
tection circuits against static discharge and transient
excess voltage.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
M54HC133
M74HC133
13 INPUT NAND GATE
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 13 3F 1R
M 74H C1 33 M1 R
M 74HC 13 3B 1R
M 74H C1 33 C1 R
PIN CONNECTIONS (top view)
October 1992
NC =
No Internal
Connection
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