M54HC132 Datasheet, PDF (1/9 Pages) STMicroelectronics – QUAD 2-INPUT SCHMITT NAND GATE

M54HC132
M74HC132
QUAD 2-INPUT SCHMITT NAND GATE
. HIGH SPEED
tPD = 11 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
I_CC = 1µA (MAX.) AT T_A = 25 °C
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. HIGH NOISE IMMUNITY
V_H (TYP.) = 0.9 V AT V_CC = 5 V
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
t_PLH = t_PHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS132
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 13 2F 1R
M 74H C1 32 M1 R
M 74HC 13 2B 1R
M 74H C1 32 C1 R
DESCRIPTION
The M54/74HC132 is a high speed CMOS QUAD 2-
INPUT SCHMITT NAND GATE fabricated in silicon
gate C²MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low power consumption. Pin configuration
and function are identical to those of the
M54/74HC00.
The hysterisis characteristics (around 20 % VCC) of
all inputs allow slowly changing input signals to be
transformed into sharply defined jitter-free output
signals. All inputs are equipped with protection cir-
cuits against static discharge and transient excess
voltage.
PIN CONNECTIONS (top view)
INPUT AND OUTPUT EQUIVALENT CIRCUIT
December 1992
NC =
No Internal
Connection
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