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M54HC09 Datasheet, PDF (1/9 Pages) STMicroelectronics – QUAD 2-INPUT AND GATE OPEN DRAIN
M54HC09
M74HC09
QUAD 2-INPUT AND GATE (OPEN DRAIN)
. HIGH SPEED
tPD = 6 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 1 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH = IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS09
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC09F1R
M 74H C0 9M 1R
M 74HC 09 B1 R
M 74H C0 9C 1R
DESCRIPTION
The M54/74HC09 is a high speed CMOS QUAD 2-
INPUT OPEN DRAIN AND GATE fabricated in sili-
con gate C2MOS technology. It has the same high
speed performance of LSTTL combined with true
CMOS low power consumption.
The internal circuit is composed of 3 stages includ-
ing buffer output, which gives high noise immunity
and stable output.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN CONNECTIONS (top view)
October 1992
NC =
No Internal
Connection
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